CV

Education

• Ph.D in Electrical and Computer Engineering, Purdue University, 2020 (expected)
• B.Tech. in Electronics Engineering, IIT (BHU) Varanasi, India, 2015

Work Experience

• Summer 2019: GPU Architect Intern
  • Samsung ACL, San Jose
  • Mentors: Anders Kugler, Wilson Fung
• Fall 2017: CPU Design Intern
  • Intel Corporation, Hillsboro
  • Mentors: Christopher Palistrant, James Hadley
• Summer 2017: ML Accelerator Architect Intern
  • Hewlett Packard Labs
  • Mentors: Dejan Milojicic, John Paul Strachan

Research Interests

• Computer Architecture
• High Performance Computing
• AI Accelerators
• Deep Learning
• Hardware-Software Codesign

Professional Affiliations

• Reviewer: DAC (expert reviewer); ICCAD (external reviewer); IEEE journals - TVLSI, TCAD, TETC, TNNLS, TCAS-2, Access; ACM journals - TACO, JETCAS, JETC
• Affiliations: Institue of Electrical and Electronics Engineers (IEEE), Semiconductor Research Corporation (SRC), Center for Brain-Inspired Computing Enabling Autonomous Intelligence (C-BRIC) - an SRC and DARPA sponsored JUMP center

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